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ST2S06A33 ST2S06B - ST2S06D33
Dual synchronous rectification with reset or inhibit, 0.5 A, 1.5 MHz adjustable step-down switching regulator
Features

Step-down current mode PWM (1.5 MHz) DC-DC converter Fixed or adjustable output voltage from 0.8 V 2% DC output voltage tolerance Synchronous rectification Reset function for A and D versions Inhibit function for B version Internal soft start for start-up current limitation and power ON delay of 50-100 s Typical efficiency: > 90% 0.5 A output current capability Non-switching quiescent current: max 1 mA over temperature range RDS(ON) 150 m (typ.) Uses tiny capacitors and inductors Available in QFN12L (4x4 mm) the power dissipation may cause a high heating of the application environment. It provides up to 0.5 A over an input voltage range of 2.5 V to 5.5 V. A high switching frequency of 1.5 MHz allows the use of tiny surface-mount components as well as a resistor divider to set the output voltage value. Only an inductor and two capacitors are required. A low output ripple is guaranteed by the current mode PWM topology and the utilization of low ESR SMD ceramic capacitors. The device is thermally protected and current limited to prevent damage due to accidental short circuit. The ST2S06 series is available in the QFN12L (4x4 mm) package.
QFN12L (4x4 mm)
Description
The ST2S06 is a dual step-down DC-DC converter optimized for powering low-voltage digital cores in ODD applications and, generally, to replace the high current linear solution when
Table 1.
Device summary
Order code ST2S06APQR(1) ST2S06A33PQR ST2S06D33PQR ST2S06BPQR Package QFN12L (4x4 mm) QFN12L (4x4 mm) QFN12L (4x4 mm) QFN12L (4x4 mm) Packaging Tape and reel Tape and reel Tape and reel Tape and reel
1. Available on request.
March 2008
Rev 3
1/21
www.st.com 21
Contents
ST2S06A33 - ST2S06B - ST2S06D33
Contents
1 2 3 4 5 6 7 8 9 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
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ST2S06A33 - ST2S06B - ST2S06D33
Diagram
1
Figure 1.
Diagram
Schematic diagram
RESET_OUT *
VI_A
VI_SW
Delay
Ref SW HV Trimming
FB1
VI_SW
FB2 CONTROL LOGIC
SW2
Ref
Soft Start
GND
INH**
GND
* ST2S06A/D ** ST2S06B
3/21
Pin configuration
ST2S06A33 - ST2S06B - ST2S06D33
2
Figure 2.
Pin configuration
Pin connections (top view)
Table 2.
Pin n 1 2 3 4 5 6 7 8 9 10 11 12
Pin description
ST2S06A/D HV FB2 GND2 SW2 VIN_SW SW1 GND1 FB1/OUT1 Reset_out NC VIN_A GND_A ST2S06B HV FB2 GND2 SW2 VIN_SW SW1 GND1 FB1 NC INH VIN_A GND_A Name and function Programing pin. It must be floating or connected to GND. Feedback voltage Power ground Switching pin Power input voltage pin Switching pin Power ground Feedback voltage / output voltage Reset out pin Inhibit pin Supply for analog circuit System ground
4/21
ST2S06A33 - ST2S06B - ST2S06D33
Maximum ratings
3
Table 3.
Maximum ratings
Absolute maximum ratings
Parameter Positive power supply voltage Positive power supply voltage Inhibit voltage Max. voltage of output pin Feedback voltage/output voltage Output voltage (for VO > 1.6 V) Common mode input voltage Max junction temperature Storage temperature range Lead temperature (soldering) 10 sec. Value -0.3 to 7 -0.3 to 7 -0.3 to 7 -0.3 to 7 -0.3 to 2.5 -0.3 to 5 +1 to -1 150 -65 to +150 300 Unit V V V V V V mA C C C
Symbol VIN_SW VIN_A VINH SWITCH voltage VFB1,2/VO1 VO1 Current into VFB pin TJ TSTG TLEAD
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Thermal data
Parameter Thermal resistance junction-case Thermal resistance junction-ambient Value 10 60 Unit C/W C/W
Table 4.
Symbol RthJC RthJA
Table 5.
Symbol ESD
ESD performance
Parameter ESD protection voltage Test conditions HBM-DH11C Value 4 Unit kV
5/21
Electrical characteristics
ST2S06A33 - ST2S06B - ST2S06D33
4
Table 6.
Electrical characteristics
Electrical characteristics for ST2S06A (VIN_SW = VIN_A = 5 V, VO1,2 = 1.2 V, C1 = 4.7 F, C2 = C3 = 22 F, L1 = L2 = 3.3 H, TJ = -30 to 125 C unless otherwise specified. Typical values are referred to 25 C
Parameter Feedback voltage VFB pin bias current Quiescent current Output current Minimum output current Reference line regulation Reference load regulation PWM switching frequency Maximum duty cycle Switching current limitation NMOS leakage current PMOS leakage current VFB = 0.9 V, TA = 25C VFB = 0.9 V, TA = 25C 2.5 V < VIN < 5.5 V 10 mA < IO < 0.5 A VFB = 0.7 V, TA = 25C VFB = 0.7 V, TA = 25C 1.2 85 1 VFB = 1 V VFB = 1 V VIN = 2.5 to 5.5 V
(1)
Symbol FB1,2 IFB1,2 IQ IO1,2 IMIN %VO1,2/ VIN VO1,2 PWM fS DMAX ISWL ILKN ILKP RDSon-N RDSon-P TSHDN THYS
Test conditions
Min. 784
Typ. 800
Max. 816 600 1.2
Unit mV nA mA A mA
0.8 1 0.032 5.5 1.5 94 1.2 0.1 0.1 0.15 0.2 75 90 130 150 15 0.3 0.4 15 1.8
%VO/ VIN mV MHz % A A A % % C C +5 %VO
NMOS switch on resistance ISW = 250 mA PMOS switch on resistance ISW = 250 mA Efficiency Thermal shut down Thermal shut down hysteresis (2) 100 mA < IO < 500 mA, tR = tF => 100 ns, TA = 25C -5
(2)
IO = 20 mA to 100 mA IO = 100 mA to 0.5 A
VO1,2/IO Load transient response (2) Reset section tDEL VRES Delay time Reset in threshold measured on input pin
TA = 25C VIN_A Rising VIN_A Falling
80 4.5 4.12
85 4.6 4.2 4.75
ms V 4.28
1. VO = 90% of nominal value. 2. Guaranteed by design, but not tested in production.
6/21
ST2S06A33 - ST2S06B - ST2S06D33 Table 7.
Electrical characteristics
Electrical characteristics for ST2S06A33 (VIN_SW = VIN_A = 5 V, V01 = 3.3 V, VO2 = 1.2 V, C1 = 4.7 F, C2 = C3 = 22 F, L1 = L2 = 3.3 H, TJ = -30 to 125 C unless otherwise specified. Typical values are referred to 25 C
Parameter Output feedback pin Feedback voltage IO1 pin bias current VFB pin bias current Quiescent current Output current Minimum output current Reference line regulation Reference load regulation PWM switching frequency(1) Maximum duty cycle Switching current limitation NMOS leakage current PMOS leakage current VFB = 0.9 V, TA = 25C VFB = 0.9 V, TA = 25C 4V < VIN < 5.5 V 10mA < IO < 0.5 A VFB = 0.7 V, TA = 25C VFB = 0.7 V, TA = 25C 1.2 85 1 VO = 3.5 V VFB = 1 V VFB = 1 V VIN = 4 to 5.5 V (1) 1 0.032 5.5 1.5 94 1.2 0.1 0.1 0.15 0.2 75 90 130 150 15 100 mA < IO < 500 mA tR = tF => 100 ns, TA = 25C -5 +5 0.3 0.4 15 1.8 0.8 Test conditions Min. 3.23 784 Typ. 3.3 800 15 Max. 3.37 816 20 600 1.2 Unit V mV A nA mA A mA %VO/ VIN mV MHz % A A A % % C C %VO
Symbol OUT1 FB2 IO1 IFB2 IQ IO1,2 IMIN %VO1,2/VI
N
VO1,2 PWM fS DMAX ISWL ILKN ILKP RDSon-N RDSon-P TSHDN THYS
NMOS switch on resistance ISW = 250 mA PMOS switch on resistance ISW = 250 mA Efficiency Thermal shut down Thermal shut down hysteresis (2)
(2)
IO = 20 mA to 100 mA IO = 100 mA to 0.5 A
VO1,2/IO Load transient response (2) Reset section tDEL VRES Delay time Reset in threshold measured on input pin
TA = 25C VIN_A Rising VIN_A Falling
80 4.5 4.12
85 4.6 4.2 4.75
ms V 4.28
1. VO= 90% of nominal value. 2. Guaranteed by design, but not tested in production.
7/21
Electrical characteristics
ST2S06A33 - ST2S06B - ST2S06D33
Table 8.
Electrical characteristics for ST2S06D33 (VIN_SW = VIN_A = 5 V, V01 = 3.3 V, VO2 = 1.2 V, C1 = 4.7 F, C2 = C3 = 22 F, L1 = L2 = 3.3 H, TJ = -30 to 125 C unless otherwise specified. Typical values are referred to 25 C
Parameter Output feedback pin Feedback voltage IO1 pin bias current VFB pin bias current Quiescent current Output current Minimum output current Reference line regulation Reference load regulation PWM switching frequency(1) Maximum duty cycle Switching current limitation NMOS leakage current PMOS leakage current VFB = 0.9 V, TA = 25C VFB = 0.9 V, TA = 25C 4V < VIN < 5.5 V 10mA < IO < 0.5 A VFB = 0.7 V, TA = 25C VFB = 0.7 V, TA = 25C 1.2 85 1 VO = 3.5 V VFB = 1 V VFB = 1 V VIN = 4 to 5.5 V
(1)
Symbol OUT1 FB2 IO1 IFB2 IQ IO1,2 IMIN %VO1,2/VI
N
Test conditions
Min. 3.23 784
Typ. 3.3 800 15
Max. 3.37 816 20 600 1.2
Unit V mV A nA mA A mA
0.8 1 0.032 5.5 1.5 94 1.2 0.1 0.1 0.15 0.2 75 90 130 150 15 0.3 0.4 15 1.8
%VO/ VIN mV MHz % A A A % % C C +5 %VO
VO1,2 PWM fS DMAX ISWL ILKN ILKP RDSon-N RDSon-P TSHDN THYS
NMOS switch on resistance ISW = 250 mA PMOS switch on resistance ISW = 250 mA Efficiency Thermal shut down Thermal shut down hysteresis (2) 100 mA < IO < 500 mA tR = tF => 100 ns, TA = 25C -5
(2)
IO = 20 mA to 100 mA IO = 100 mA to 0.5 A
VO1,2/IO Load transient response (2) Reset section tDEL VRES Delay time Reset in threshold measured on input pin
TA = 25C VIN_A Rising VIN_A Falling
52
65
78 4.55
ms V
3.625
3.7
3.775
1. VO= 90% of nominal value. 2. Guaranteed by design, but not tested in production.
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ST2S06A33 - ST2S06B - ST2S06D33 Table 9.
Electrical characteristics
Electrical characteristics for ST2S06B (VIN_SW = VIN_A = 5 V, VO1,2 =1.2 V, C1= 4.7 F, C2 = C3 = 22 F, L1 = L2 = 3.3 H, TJ = -30 to 125 C unless otherwise specified. Typical values are referred to 25 C
Parameter Feedback voltage VFB pin bias current Quiescent current Output current Minimum output current 2.5V < VIN < 5 V VFB = 1 V VINH > 1.2 V, VFB = 1 V VINH < 0.4 V VIN = 2.5 to 5.5 V
(1)
Symbol FB1,2 IFB1,2 IQ IO1,2 IMIN
Test conditions
Min. 784
Typ. 800
Max. 816 600 1 1
Unit mV nA mA A A mA
0.8 1 1.2 1.3
VINH
Inhibit threshold
2.5V < VIN < 5.5 V Device OFF
V 0.4 2 A %VO/ VIN 15 1.8 mV MHz % A A A 0.3 0.4 % % C C +5 %VO
IINH1,2 %VO1,2/ VIN VO1,2 PWM fS DMAX ISWL ILKN ILKP RDSon-N RDSon-P TSHDN THYS
Inhibit pin current Reference line regulation Reference load regulation PWM switching frequency(1) Maximum duty cycle Switching current limitation NMOS leakage current PMOS leakage current VFB = 0.9 V, TA = 25C VFB = 0.9 V, TA = 25C 2.5V < VIN < 5.5 V 10 mA < IO < 0.5 A VFB = 0.7 V, TA = 25C VFB = 0.7 V, TA = 25C 1.2 85 1 0.032 5.5 1.5 94 1.2 0.1 0.1 0.15 0.2 75 90 130 150 15 100 mA < IO < 500 mA, tR = tF1 => 100 ns, TA = 25C -5
NMOS switch on resistance ISW = 250 mA PMOS switch on resistance ISW = 250 mA Efficiency Thermal shut down Thermal shut down hysteresis (1)
(2)
IO = 20 mA to 100 mA IO = 100 mA to 0.5 A
VO1,2/IO Load transient response (1)
1. VO= 90% of nominal value.
2. Guaranteed by design, but not tested in production.
9/21
Typical performance characteristics
ST2S06A33 - ST2S06B - ST2S06D33
5
Figure 3.
Typical performance characteristics
Feedback voltage 1 vs. temperature Figure 4. (ST2S06B) Feedback voltage 2 vs. temperature (ST2S06B)
0.82
VI=5V, VFB1 connected to VO1 IO1=IO2=NO LOAD
0.82
VI=5V, VFB2 connected to VO2 IO1=IO2 =NO LOAD
0.81 VFB1 [V] 0.8 0.79 0.78 -50 -25 0 25 50 75 100 125 TEMPERATURE [C]
0.81 VFB2 [V] 0.8 0.79 0.78 -50 -25 0 25 50 75 100 125 TEMPERATURE [C]
Figure 5.
Efficiency vs. output current 1
Figure 6.
Efficiency vs. output current 2
100 95 90 85 80 75 70 65 60 0 0.1 0.2
VI=5V, VO1=3.3V, IO2 NO LOAD
100 95 90 85 80 75 70 65 60 55 50 45 40 0
VI=5V, VO2=1.2V, IO1 NO LOAD
0.3
0.4
0.5
0.6
EFFICIENCY [%]
EFFICIENCY [%]
0.1
0.2
0.3
0.4
0.5
0.6
Output Current 1 [A]
Output Current 2 [A]
Figure 7.
Switching frequency vs. temperature (ST2S06A)
Figure 8.
Duty cycle vs. temperature (ST2S06A)
1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 -50
VI=5V, VFB1=3.2V, VFB2=0.7V
100 99 98 97 96 95 94 93 92 91 90 -50
VI=5V, VFB1=3.2V, VFB2=0.7V
Frequency [MHz]
-25
0
25
50
75
100
125
Duty Cycle [%]
-25
0
25
50
75
100
125
Temperature [C]
Temperature [C]
10/21
ST2S06A33 - ST2S06B - ST2S06D33
Typical performance characteristics
Figure 9.
Switching frequency vs. temperature (ST2S06B)
Figure 10. Inhibit threshold vs. temperature (ST2S06B)
1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 -50 -25 0 25 50 75 100 125 Temperature [C]
1.4 1.2 1 VINH (V) 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 T [C]
VI=5V, IO1= IO2=100mA
Frequency [MHz]
ON
OFF
75
100
125
Figure 11. Switching current limitation vs. input voltage (ST2S06A)
Figure 12. PMOS switch on resistance vs. temperature
2
VI from 2.5V to 5.5V, Output2 Maximum load Current
240 RDSON -P[mOhm] 220 200 180 160 140 120 100
VCC=5V, ISW=250mA
1.8 ISW2 [A] 1.6 1.4 1.2 1 2.5 3 3.5 4 VI [V] 4.5 5 5.5
-50
-25
0
25
50 T [C]
75
100
125
Figure 13. NMOS switch on resistance vs. temperature
Figure 14. Delay time vs. temperature (ST2S06A)
170 RDSON -N[mOhm] 150 130 110
VCC=5V, ISW=250mA
VI VRES
90 70 50 -50 -25 0 25 50 T [C] 75 100 125
VI Rising from 0V to 5V, Delay from VRES threshold and reset pin below 0V.
11/21
Typical performance characteristics
ST2S06A33 - ST2S06B - ST2S06D33
Figure 15. Delay time vs. temperature (ST2S06A)
Figure 16. Reset in threshold vs. temperature (ST2S06A)
100 95 90 85 80 75 70 65 60 55 50 -50
VI Rising from 0V to 5V
5 4.9 4.8 4.7 4.6 4.5 4.4 4.3 4.2 4.1 4 -50 -25 0 25
T DEL (ms)
Rising
VRES (V)
Falling
-25
0
25
50 T [C]
75
100
125
50
75
100
125
T [C]
Figure 17. Reset in threshold vs. temperature Figure 18. Delay time vs. temperature (ST2S06D) (ST2S06D)
4.4 4.3 4.2 4.1 4 3.9 3.8 3.7 3.6 3.5 -50 -25 0
75
Rising
70 TDEL (ms) 65 60
VIN Rising from 0V to 5V
VRES (V)
Falling
55 50 -50
25
50 T [C]
75
100
125
-25
0
25
50 T [C]
75
100
125
Figure 19. Load transient response (ST2S06A) Figure 20. Start-up transient (ST2S06A)
VO1
VI VO1
IO1
VI= 5V, IO1 from 100mA to 500mA
VI= from 0V to 5V, IO1=500mA, Output Voltage=3.3V
12/21
ST2S06A33 - ST2S06B - ST2S06D33
Typical performance characteristics
Figure 21. Start-up transient (ST2S06B)
Figure 22. Inhibit transient (ST2S06B)
IO1 VI VO1
VINH
VO1 VO2
VI= from 0V to 5V, IO1 =1A, Output Voltage=1.2V
VINH= from 0V to 2V, VI=5V, IO1=IO2=1A
13/21
Typical application
ST2S06A33 - ST2S06B - ST2S06D33
6
Typical application
Figure 23. Application circuit for ST2S06A/D
VIN
VIN_A VIN_SW SW2 VFB2
L2
3.3H R3 V O2
ST2S06A/D
NC Reset_Out GND1 GND2 HV SW1 VFB1 GND_A
L1 3.3H R1 VO1
C1 4.7F R2 C2 22F R4 C3 22F
Figure 24. Application circuit for ST2S06B
VIN
VIN_A VIN_SW
L2
SW2 VFB2
3.3H R3 VO2
ST2S06B
INH NC GND1 GND2 HV SW1 VFB1 GND_A
L1 3.3H R1 VO1
C1 4.7F
R2
C2 22F
R4
C3 22F
14/21
ST2S06A33 - ST2S06B - ST2S06D33
Application information
7
Application information
The ST2S06 represents a series of dual adjustable current mode PWM step-down DC-DC converters with an internal 0.5 A power switch, packaged in a QFN12L (4x4 mm). It is a complete 0.5 A switching regulator with internal compensation that eliminates the need for additional components. The constant frequency, current mode, PWM architecture and stable operation with ceramic capacitors results in low, predictable output ripple. To clamp the error amplifier reference voltage a Soft Start control block generating a voltage ramp has been implemented. Other circuits fitted to the device protection are the Thermal Shut-down block, which turns off the regulator when the junction temperature exceeds 150 C (typ.), and the cycle-by-cycle current limiting that provides protection against shorted outputs. Because the ST2S06 is an adjustable regulator, the output voltage is determined by an external resistor divider. The desired value is given by the following equation: VO = VFB [1+R1/R2] Operation of the device requires few components: 2 inductors, 3 capacitors and a resistor divider. The chosen inductor must be capable of not saturating at the peak current level. Its value should be selected keeping in mind that a large inductor value increases the efficiency at low output current and reduces output voltage ripple, while a smaller inductor can be chosen when it is important to reduce package size and total application cost. Finally, the ST2S06 has been designed to work properly with X5R or X7R SMD ceramic capacitors both at the input and at the output. These types of capacitors, due to their very low series resistance (ESR), minimize the output voltage ripple. Other low ESR capacitors can be used according to the need of the application without compromising the correct functionality of the device. Due to the high switching frequency and peak current, it is important to optimize the application environment by reducing the length of the PCB traces and placing all the external components near the device.
Figure 25. Reset function
VIN
VTH VTL tDEL
Reset
15/21
Package mechanical data
ST2S06A33 - ST2S06B - ST2S06D33
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
16/21
ST2S06A33 - ST2S06B - ST2S06D33
Package mechanical data
QFN12L (4x4) mechanical data
mm. Dim. Min. A A1 A3 b D D2 E E2 e L 0.45 0.25 3.90 2.00 3.90 2.00 0.80 Typ. 0.90 0.02 0.20 0.30 4.00 2.15 4.00 2.15 0.80 0.55 0.65 0.018 0.35 4.10 2.25 4.10 2.25 0.010 0.154 0.079 0.154 0.079 Max. 1.00 0.05 Min. 0.031 Typ. 0.035 0.001 0.008 0.012 0.157 0.085 0.157 0.085 0.031 0.022 0.026 0.014 0.161 0.089 0.161 0.089 Max. 0.039 0.002 inch.
7936361B
17/21
Package mechanical data
ST2S06A33 - ST2S06B - ST2S06D33
Tape & reel QFNxx/DFNxx (4x4) mechanical data
mm. Dim. Min. A C D N T Ao Bo Ko Po P 4.35 4.35 1.1 4 8 12.8 20.2 99 101 14.4 0.171 0.171 0.043 0.157 0.315 Typ. Max. 330 13.2 0.504 0.795 3.898 3.976 0.567 Min. Typ. Max. 12.992 0.519 inch.
18/21
ST2S06A33 - ST2S06B - ST2S06D33
Package mechanical data
Figure 26. QFN12L (4x4 mm) footprint recommended data
19/21
Revision history
ST2S06A33 - ST2S06B - ST2S06D33
9
Table 10.
Date
Revision history
Document revision history
Revision Changes
3-Sep-2007 21-Jan-2008 18-Mar-2008
1 2 3
Initial release. Added root part number ST2S06D33. Modified: Table 2 on page 4.
20/21
ST2S06A33 - ST2S06B - ST2S06D33
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